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Vacature FPGA engineer

Cymo is a young company who produces and sells advanced mediacal equipment. Development, assembly, marketing and sales all takes place in Groningen. We sell our products internationally and are present on medical fairs in and outside of Europe.

Job description
Highly qualified self-sufficient designer needed to develop, debug, and integrate processor subsystem features and interfaces in FPGA hardware. Task entails FPGA requirements development, FPGA code development of high speed interfaces, generation of self-checking test bench, unit test, synthesis, timing analysis, Built-In-Test (BIT) and support of debug and system integration activities. Individual needs to be familiar with signal processing, image processing, hands on experience with Xilinx FPGA toolsets for Ultrascale +, generating signal processing firmware (Verilog, VHDL), high speed device integration, debugging signal processing Matlab based algorithms, and resolving timing distribution issues.

Required qualification
Required: Bachelor’s degree or higher in Electrical or Computer Engineering or related with a concentration in FPGA design and Digital Signal Processing through either coursework or relevant experience.
Preferred: Master's, in Electrical or Computer Engineering.

Skills
Experience of FPGA design & implementation for video and image processing
Experienced engineer, fully versed in design methodologies for your field
Experienced engineer with good FPGA development process knowledge
Good understanding of requirements capture, and of work package definition and estimation
Good communication, both oral and written
Experience of image processing based on Xilinx FPGA
Proficiency in HDL language and proper coding practices (Verilog preferred); a simulation and FPGA synthesis tool.
Familiar with programing of embedded C.
Experience of achieving robust timing closure in complex FPGA devices
Experience with AXI interface standards
Digital design including interfacing to hardware, peripherals and processors
Ability to work with/develop timing constraints
Ability to develop and maintain scripted build flows (TCL/ Python)

Job conditions
Hours: 38 hrs per week.
Location: Groningen.
Type of contract: 1 year fixed (1st month try-out period), with possible extension.
Holiday: 200 hours per year.

Apply?
You can apply by e-mailing your resume and letter to Johan Palmen